STS Advanced Device Process Session

Foundry market growth has been continuously made and recent AI technology accelerates a strong demand in HPC application, which opens tremendous opportunities for the semiconductor industry. There is no doubt that the growth has been led by countless technology innovations, including material/tool/design. Among those evolutions, one of key breakthroughs is Transistor dimension change, like Planer transistor to FinFET. The dimension change can creates not only tremendous Power/Performance/Area improvement, but also an additional value for design collaboration (DTCO). Currently the industry is in a transition for another dimension Gate-All-Around (GAA) transistor to make another technology leap and GAA products have been already launched. In this presentation, the advanced logic platform technology in new dimension era will be introduced.

Flash memory is a very simple device consisting of floating gate transistors connected in series. Because of its simplicity, flash memory was the first among all semiconductor memories to reach the technological limit of high density by miniaturization in a plane. 3D flash memory broke through the technological limits of conventional flash memory by stacking many MONOS-type transistors and continued to further increase the memory density. Today, ultra-high memory density has been achieved to a level where 256 gigabytes of digital data can be stored on a single chip of only 1 cm2 in size. In recent years, following flash memory, 3D technology has been actively studied in DRAM and logic devices. In this presentation, I will introduce technical issues and countermeasures for high stacking of 3D flash memory. In addition, Moore's law has been promoted against the background of the scaling law. On the other hand, the scaling law does not hold true for densely stacked memory, and a new technical challenge has revealed for increasing speed. In this presentation, I will introduce the issues and countermeasures for high-speed improvement caused by the high stacking density of 3D flash memory.

This presentation overviews memory centric AI accelerators and computing for AI applications. To resolve the Von Neumann bottleneck, data movement should be minimized. CiM, Computation-in-Memory technogy achives the processing and memory functions such as MAC functions by a single memory cell. As a reculst, the extremely low power, high performance and low cost AI caclutation is realized.