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STS Metrology/Inspection Session

Metrology & Inspection Technology for Leading-edge Devices and Advanced Packaging

Thursday, December 12 | 2:30 pm - 4:30 pm

Conference Tower 607 / Online (Zoom)

Paid  Simultaneous Interpretation

Fee (Exclusive of tax) 

  • Per Session : SEMI Members  10,000JPY  /  Non-Members  20,000JPY
  • STS 1 Day Pass : SEMI Members  27,000JPY  /  Non-Members  54,000JPY

*Above fee includes "Download Presentation Materials" (some presentation materials might be written in Japanese)
*Please note that there are separate tickets for in-person and online participation.
 

In recent devices technology of semiconductor process, the expansion of EUV application and miniaturization due to the introduction of High NA EUV, as well as the increasing complexity of device structures due to GAA/CFET and further stacking, are progressing. Also, in advanced packages technology, the application of 2.5D/3D structures is expanding. These devices requires high-precision measurements and high-sensitivity inspections for finer and more complex structures than ever before, and various technological developments are progressing. The latest trends in these areas will be discussed.
 

< SEMI Technology Symposium (STS) >
This first technology seminar series in SEMICON Japan founded in 1982, now grown to the international tech symposium marks the 43rd this year. It has been developed as a place to discuss technology among engineers by picking-up the semiconductor technology trends and its issue and sharing the practical technologies to the industry. This symposium stimulates global business growth by involving a variety of different players and visitors.
This program is organized thanks to "SEMI Technology Steering Committee (STS)" formed by top engineers from industry-leading companies, universities, and research institutions.

 

Program Agenda
*Please note that the program may be subject to change.

Session Chairs: *In alphabetical order by company name
Shoji Hotta (Hitachi High-Tech), Hajime Nakamura (Onto Innovation Japan), Yuichiro Yamazaki (TASMIT), Masafumi Asano (Tokyo Electron)     

 

14:30 - 15:10
Measurement and Inspection Technology Challenges in the Manufacturing of 2nm Logic Devices
Kenji Watanabe
Kenji Watanabe
Rapidus
Device Technology Department
Senior Engineer

As devices progress beyond 2nm, both miniaturization and three-dimensional structuring advance, making the development of corresponding advanced measurement, inspection, and analysis technologies a critical challenge. Additionally, Rapidus aims for ultra-short TAT production through single-wafer processing, necessitating challenges that differ from traditional concepts, including the utilization of large amounts of data obtained from each wafer. This report will cover the efforts to address these technical challenges.

15:10 - 15:50
Inspection & Metrology Innovations in the Age of Artificial Intelligence (A.I.)
Mike Rosa
Mike Rosa
Onto Innovation
Chief Marketing Officer (CMO) & SVP Strategy

The next wave of growth is going to be largely dominated by the demand for AI enabled and Specialty device technologies.  Whether in Automotive, Industrial or Consumer applications, the demand for AI and Specialty technologies cuts across multiple segments of the semiconductor industry from advanced node next generation CPU/GPUs to advanced high bandwidth memory, chiplet technologies drawn from a variety of mature and specialty node device technologies to finally, advanced packaging at both the wafer and panel levels.  This presentation will introduce Onto Innovation and highlight both the challenges faced and newly developed innovations 
supporting waves of end market growth enabled by advanced technologies such as AI or enabling specialty technologies such as Power in Automotive and Green Energy.

15:50 - 16:30
X-ray Nondestructive Characterization for inside of Advanced Electronics Structure
Kazuhiko Omote
Kazuhiko Omote
Rigaku
X-ray Research Laboratory
Director

Recently, shrinking of the device area is close to the physical limit and vertical stacking structures are extensively developed, such as 3D NAND, CFET, and so forth. Therefore, metrology is facing new challenges to evaluate such stacked complex structure. X-ray is the most feasible candidate for characterizing those structures nondestructively, due to its high-penetration power and high-resolution analysis capability. We will introduce several typical examples.

17:00 - 18:00
STS GETOGETHER ~ Adv. Lithography & Photomask & Device Process & Metrology / Inspection  

STS GETOGETHER

Please stay for the get-together, the exceptional networking opportunities to deepen and extend your business and partnership with the speakers, attendees, and exhibitors after the session.

For those who would join this event, please come to the venue (TBA by begining of November) around 5 PM.

*Please note that a visitor badge is required to enter this event, even though no application is needed in advance.