SEMI Technology Symposium (STS) Call for Papers
Registration is now closed.
Abstracts submission deadline: 18 June, 2010; STS to be held 1-3 December 2010 in Japan
Semiconductor Equipment and Materials International (SEMI) is soliciting papers from authors around the world for the SEMI Technology Symposium 2010. This program will provide a forum for the presentation and discussion of important technical work on the topics that follow.
Abstracts of approximately 250 words and a 100-word speaker biography are due 18 June 2010 by e-mail. Abstracts must clearly detail the nature, scope, content, organization, key points and significance of the proposed paper.
Presentations are to be original and non-commercial in that they focus on the technical merits of a process rather than on the individual company's product benefits. Selected presenters will be notified end of July 2010.
For additional information, contact Nobuko Yamamoto at jprogram@semi.org, phone: +81-3-3222-6020
Lithography
- Excimer Steppers/Scanners
- Immersion Lithography
- Image Evaluation Technology
- Aberration
- Overlay
- Focusing
- Resolution Enhancement Technology
- Photo resist
- Light Source Development
- NGL-Next Generation Lithography Tool: EB/EUV/NIL etc.
- Metrology
- Lithography Simulation Technology
- Double Patterning
- Computational Lithography
DFM &Mask
- DFM Technology
- Design and Process Integration
- OPC, PPC, RET Mask Data Processing
- ORC, Process Modeling, Mask Printability Simulation
- PSM and CPL
- EUV Masks
- Metrology
- Defect Inspection/Repair
- Cleaning/ Pellicle/ Haze Control
- Process Control
- Template technologies for Nanoimprint
- Mask writing technologies
Inspection/Metrology
- CD measurement
- Pattern profile measurement
- Hot spot inspection
- Film thickness measurement
- Integrated Metrology
- Virtual Metrology
- Particle, defect inspection
- Defect review, analysis
- Yield Management
- Electrical property testing
- TEG
Advanced Element Process
- Low-k Film Technology
- Advanced Metallization Technology (Cu, Al, Ag)
- Advanced CMP Technology
- Cu Electroplating
- Atomic Layer Deposition
- Damascene Technology
- Interconnect Integration
- Plug Formation Technology
- Reliability of Interconnection
- 3D package
- Green engineering for semiconductor industry (PFC measures, Energy-saving technology, Exhaust gas and effluent treatment system)
- Low-k or carbon-polymer etching
- Damage control for damascene etching
- Metal-gate etching
- High-k etching
- High aspect ratio contact (HARC) etching
- Double patterning etching
- TSV Etching
- Etching variability control (LER/LWR)
- Etching profile and device characteristics
- Metrology for etching profile and etching condition
- Etching equipment and metrology equipment
- Others
Advanced Device Technology
< High performance device technology (More Moore) >
- Advanced logic device
- Advanced memory device
- Analog, passive device
- Power device
- Emerging research device( post CMOS, post Flash/DRAM)
< IC multiple functional technology (More Than Moore) >
- On-chip embedded IC technology (System On Chip)
- 3D embedded IC packaging technology (System in Package)
- IC interconnect technology (Through Si Via, nano-optical/wireless connection)
- Si logic device embedded
with memory/analog/passive/power device,
with heterogeneous device,
with MEMS, - with bio chip,
with organic device,
with electroluminescence device, - with power generation device.
Manufacturing Science
Improvement in efficiency of process Development and Spread of New Technology, and any other activities at Fab
- Yield Improvement
- Mass Scrap Restraint
- WIP Reduction
- SCM
- Improvement of OEE
- Saving Energy
- Cut Materials
- Zero-emission
- e-manufacturing
- 300mmPRIME
- 450mm manufacturing technology
- DFT
Packaging
< New Products>
- LED
- Sensor
- Wireless Module
- Power Device
- MEMS Products
< New Technology>
- SiP
- Flip Chip
- Assembly Technology in Ultra High Speed
- Environmental Assembly Technology (Lead free, Eco-design)
- 3D Packaging/TSV etc.
- Wafer Level Packaging
- Thermal, Electrical Design
- Multi-bus, connection, Micro-Bump
Testing
- DFT, DFM, DFA, DFR
- Cost of testing
- Analysis technology
- Measuring methods
- Peripheral technology, such as Probe/Contact
- Others
Microsystems/MEMS
- Microsystems
- Micro Electro Mechanical Systems (MEMS)
- Micromachining
- Nanomachining
- 3D microfabrication
- Equipments for fabrication and testing
- Micro sensors
- Micro actuators
- Micro structures
- Micro energy sources
- Packaging
- Integrated MEMS
- MEMS foundary
- Domestic and oversee circumstance
ASSOCIATION CONTACTS:
Nobuko Yamamoto /SEMI Japan
Tel: 81.3.3222. 6020
E-mail: jprogram@semi.org