SEMI Technology Symposium (STS) 2013 Call for Papers


SEMI is soliciting papers from authors around the world for SEMI Technology Symposium 2013 (STS 2013) at SEMICON Japan 2013, which takes place December 4-6 at the Makuhari Messse in Chiba, Japan.


Deadline for submissions has passed, we have closed the registration.

Submit to:
*You will be notified status of your submission by the end of July.


- Submit a 150 word abstract and a 100-word speaker biography

- Accuracy in Title and Description: The quality of the description of your presentation matters. The ability for your description to clearly explain what the attendees will take away from your presentation is critical for your submission to make it through the review process.

- Abstracts must clearly detail the nature, scope, content, organization, key points and significance of the proposed paper. Presentations are to be original and non-commercial in that they focus on the technical merits of a process rather than on the individual company's product benefits.




  • Optical Steppers/Scanners (Dry & Wet)

  • EUV Scanner

  • Aberration

  • Overlay

  • Focusing

  • Photo resist

  • Light Source Development

  • Next generation patterning technologies-EB/Nanoimprint/DSA/others

  • Metrology

  • Lithography Simulation Technology

  • Double/Multiple patterning

  • Computational Lithography

DFM &Mask

  • DFM Technology

  • Design and Process Integration

  • OPC, PPC, RET Mask Data Processing

  • ORC, Process Modeling, Mask Printability Simulation

  • PSM and CPL

  • EUV Masks

  • Metrology

  • Defect Inspection/Repair

  • Cleaning/ Pellicle/ Haze Control

  • Process Control

  • Template technologies for Nanoimprint

  • Mask writing technologies

  • Mask handling technology


Advanced Device Technology / Process

< High performance device technology >

  • Advanced logic device
    Advanced memory device
    Analog, passive device
    Power device
    Emerging research device  (post CMOS, post Flash/DRAM)
    Imaging sensor, CMOS
    Advanced device process


< IC multiple functional technology (More Than Moore) >

  • On-chip embedded IC technology (System On Chip)
    3D embedded IC packaging technology (System in Package)
    IC interconnect technology (Through Si Via, nano-optical/wireless connection)
    Si logic device embedded
    with memory/analog/passive/power device,
    with heterogeneous device,
    with MEMS,
    with bio chip,
    with organic device,
    with electroluminescence device,
    with power generation device.





  • Cost of testing

  • Analysis technology

  • Measuring methods / Testing methods

  • Peripheral technology, such as Probe/Contact

  • Others


For more information, contact Nobuko Yamamoto at

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